Memory unit test

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing

Reexamination Certificate

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Details

C714S718000, C714S722000, C365S201000

Reexamination Certificate

active

10494794

ABSTRACT:
The invention relates to a method and device for operating and/or testing memory units, which make it possible to conduct a time-saving test of semiconductor memories during running operation. The inventive method for testing memory units having storage locations provides that, for the storage locations, a first item of test information is formed according to a variable parameter assigned to the respective storage location and according to the contents of the respective storage location.

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IBM Corp., “Error Detection Method for RAM with Stuck Output Latches”, IBM Technical Disclosure Bulletin, vol. 33, No. 7, IBM Corp., New York, US, Dec. 1990, pp. 157-158.

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