Method of fabricating non-volatile memory structure

Details Method of fabricating non-volatile memory structure Method of fabricating non-volatile memory structure

2007-06-26

2007-06-26

Booth, Richard A. (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257SE21179

Reexamination Certificate

active

11620724

ABSTRACT:
A substrate having a first dielectric layer, a first conductive layer and a second dielectric layer thereon is provided. A part of the second dielectric layer is removed to form a first opening having both ends with a select gate region respectively. The select gate region is constituted by a region with the second dielectric layer and a region without the second dielectric layer. A second conductive layer is formed to cover the second dielectric layer. A cap layer is formed on the second conductive layer. The cap layer, the second conductive layer, the second dielectric layer and the first conductive layer are patterned to form gate structures. The cap layer, the second conductive layer, the second dielectric layer and the first conductive layer between two adjacent select gate regions are removed to form a select gate structure. A doped region is formed in the substrate.

REFERENCES:
patent: 6218689 (2001-04-01), Chang et al.
patent: 2002/0098651 (2002-07-01), Yim et al.
patent: 2005/0035396 (2005-02-01), Yaegashi
patent: 2006/0040447 (2006-02-01), Violette et al.

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