Indium-boron dual halo MOSFET

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S306000, C257S344000, C257S408000

Reexamination Certificate

active

10261715

ABSTRACT:
A method including forming a transistor device having a channel region; implanting a first halo into the channel region; and implanting a second different halo into the channel region. An apparatus including a gate electrode formed on a substrate; a channel region formed in the substrate below the gate electrode and between contact points; a first halo implant comprising a first species in the channel region; and a second halo implant including a different second species in the channel region.

REFERENCES:
patent: 5985727 (1999-11-01), Burr
patent: 6555437 (2003-04-01), Yu
Jinning Liu, Ukyo Jeong, Sandeep Mehta, Joe Sherbondy, Andy Lo, Kyu Ha Shim, and Jae Eun Lim, “Investigation of Indium Activation by C-V Measurement,” Proc. Ion Impl. Tech. Conf., Sep. 17, 2000, pp. 66-69.
J.S. Williams and R.G. Elliman, “Substitutional Solid Solubility Limits During Solid Phase Epitaxy of Ion Implanted (100) Silicon,” Appl. Phys. Lett., vol. 40 (Feb. 1, 1982) pp. 266-268.
Odanaka et al., “Double Pocket Architecture Using Indium and Boron for Sub-100 NM MOSFETS,” IEEE Electron Device Letters, vol. 22, No. 7, Jul. 2001, pp. 330-332.
Miyashita et al., “Optimized Halo Structure for 80 nm Physical Gate CMOS Technology with Indium and Antimony Highly Angled Ion Implantation,” IEDM Technical Digest International, Dec. 1999, pp. 645-648.
Onimatsu et al., “Influence of Extension Formation Process on Indium Halo Profile,” Extended Abstracts of the 2001 International Conference on Solid State Devices, 2001, pp. 184-185.
Noda et al., “Effects of End-of Range Dislocation Loops on Transient Enhanced Diffusion of Indium Implanted in Silicon,” Journal of Applied Physics, vol. 88, No. 9, Nov. 2000, pp. 4980-4984.

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