Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-10-09
2007-10-09
Lebentritt, Michael (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S387000, C438S302000, C438S720000, C257SE21584, C257SE21591, C257SE21592
Reexamination Certificate
active
10985481
ABSTRACT:
A method of fabricating a chalcogenide memory cell is described. The cross-sectional area of a chalcogenide memory element within the cell is controlled by the thickness of a bottom electrode and the width of a word line. The method allows the formation of ultra small chalcogenide memory cells.
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patent: 6111264 (2000-08-01), Wolstenholme et al.
patent: 6114713 (2000-09-01), Zahorik
patent: 6189582 (2001-02-01), Reinberg et al.
patent: 6514788 (2003-02-01), Quinn
patent: 6597009 (2003-07-01), Wicker
Lebentritt Michael
Macronix International Co. Ltd.
Pompey Ron
Stout, Uxa Buyan & Mullins, LLP
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