Dual frequency first-in-first-out structure

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

Reexamination Certificate

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C365S219000

Reexamination Certificate

active

11168818

ABSTRACT:
Techniques and circuitry for transferring data from memory arrays of a memory device to output pins via a FIFO structure are provided. Input and output stages of the FIFO structure may be operated independently, allowing data to be loaded into the FIFO structure at a first frequency and unloaded from the FIFO structure at a second frequency.

REFERENCES:
patent: 4429300 (1984-01-01), Yamasawa et al.
patent: 5543791 (1996-08-01), Riggio, Jr.
patent: 6335696 (2002-01-01), Aoyagi et al.
patent: 6337826 (2002-01-01), Imai et al.
patent: 6427197 (2002-07-01), Sato et al.
patent: 6563485 (2003-05-01), Ho et al.
patent: 6600691 (2003-07-01), Morzano et al.

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