Integrated semiconductor storage with at least a storage...

Details Integrated semiconductor storage with at least a storage... Integrated semiconductor storage with at least a storage...

2007-07-10

2007-07-10

Vu, David (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257S302000

Reexamination Certificate

active

11283804

ABSTRACT:
The invention relates to an integrated semiconductor memory with at least one memory cell having at least one transistor which forms an inversion channel in the switched-on state. The transistor comprises a structure element having a first source/drain region, a second source/drain region and a region arranged between the first and the second source/drain region, the structure element is insulated from a semiconductor substrate by an insulation layer, a gate dielectric being arranged on the structure element and a word line being arranged on the gate dielectric.

REFERENCES:
patent: 5214603 (1993-05-01), Dhong et al.
patent: 5250829 (1993-10-01), Bronner et al.
patent: 5576637 (1996-11-01), Akaogi et al.
patent: 5889304 (1999-03-01), Watanabe et al.
patent: 5953246 (1999-09-01), Takashima et al.
patent: 5999444 (1999-12-01), Fujiwara et al.
S.M. Sze, “Physics of Semiconductor Devices”, ISBN 0-471-09837-X, pp. 438-493, 1981, New York.

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