Method and apparatus for low voltage write in a static...

Static information storage and retrieval – Read/write circuit – Precharge

Reexamination Certificate

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C365S154000, C365S226000

Reexamination Certificate

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11123484

ABSTRACT:
An integrated circuit memory includes a plurality of memory cells, where each of the plurality of memory cells comprises a first storage node and a second storage node. Each of the plurality of memory cells comprises a transistor coupled between the first and second storage nodes and responsive to an equalization signal. An equalization control circuit provides the equalization signal to selected memory cells of the plurality of memory cells. The equalization control circuit is for equalizing a voltage between the first and second storage nodes to enable to a write operation of the selected memory cells. During the write operation a data signal is provided to a first bit line that swings between a logic high voltage equal to a power supply voltage and a logic low voltage equal to ground potential. The transistor and the equalization control circuit enables reliable memory operation at low power supply voltages.

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Woodward “Demultiplexing 2.48-Gb/s Optical Signals with a CMOS Receiver Array Based on Clocked-Sense-Amplifiers” IEEE Photonics Technology Letters, vol. 9, No. 8, Aug. 1997.

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