Semiconductor integrated circuit and method of designing the...

Details Semiconductor integrated circuit and method of designing the... Semiconductor integrated circuit and method of designing the...

2007-04-17

2007-04-17

Potter, Roy (Department: 2822)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

Reexamination Certificate

active

10817817

ABSTRACT:
According to the present invention, a semiconductor integrated circuit having a cell region in which a plurality of MOS transistors forming at least one cell are placed; and first and second power lines placed along one direction in a peripheral portion of the cell region, wherein in the cell region, gate grids for defining a first pitch in the one direction and pin grids for defining a second pitch in the one direction are set, gate electrodes of the MOS transistors are placed in accordance with the gate grids, and an interconnection layer is placed in accordance with the pin grids.

REFERENCES:
patent: 5929469 (1999-07-01), Mimoto et al.
patent: 6026225 (2000-02-01), Iwasaki
patent: 60-140853 (1985-07-01), None
patent: 03-012963 (1991-01-01), None
patent: 10-154756 (1998-06-01), None
patent: 2000-22084 (2000-01-01), None
patent: 2001-168291 (2001-06-01), None

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