Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-01-16
2007-01-16
Nguyen, Tuan H. (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S279000
Reexamination Certificate
active
10909685
ABSTRACT:
Certain embodiments include a semiconductor device capable of preventing a retardation of signal transmission between the smallest units, a method for the manufacture thereof, a circuit substrate and an electronic device. Embodiments also include a manufacturing method comprising a laminating step of forming tunnel insulating films12and22,floating gates14and24,dielectric films16and26,control gates18and28on first and second memory cell areas10and20formed mutually adjacent to each other on a semiconductor substrate30,a plurality of impurity area formation steps of forming sources and drains32, 34, 36and38on the first and second memory cell areas10and20,and forming a connecting area40capable of forming an electric connection between one32of the source and drain of the first memory cell area10and one36of the source and drain of the second memory cell area20.The connecting area40is formed to have a lower electric resistance than impurity areas42and44formed in one of the of impurity area formation steps.
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Examination Result from Japanese Patent Office for Japanese Patent Application No. 11-239380, dated Dec. 28, 2004.
Konrad Raynes & Victor LLP
Nguyen Tuan H.
Raynes Alan S.
Seiko Epson Corporation
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