Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2007-09-11
2007-09-11
Trinh, Michael (Department: 2822)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C438S787000, C438S788000, C438S905000
Reexamination Certificate
active
10693457
ABSTRACT:
A method of forming a PE-TEOS layer of a semiconductor IC device provides uniformly thick PE-TEOS layers on a batch of wafers. First, a loading wafer cassette is prepared to provide the wafers to be processed. Next, a process atmosphere is pre-created in a processing chamber. Then the wafers are supplied in sequence into the chamber from the loading wafer cassette and the wafers are mounted on a heater table in the chamber. Next, the PE-TEOS layer is deposited on the wafers by spraying a process gas into the chamber through showerheads. Next, the wafers are discharged from the chamber. Once the chamber is cleared of wafers, the inside of the chamber is cleaned by supplying a cleaning gas into the chamber, and exciting the cleaning gas with RF power. Subsequently, more TEOS gas is supplied into the chamber through the showerheads without being excited by RF power to especially reduce the temperature of the showerheads and that prevailing inside the chamber. In particular, the temperature within the chamber is brought back down to the process temperature.
REFERENCES:
patent: 5970383 (1999-10-01), Lee
patent: 6127261 (2000-10-01), Ngo et al.
patent: 6214751 (2001-04-01), Lee
patent: 6242347 (2001-06-01), Vasudev et al.
patent: 6819969 (2004-11-01), Lee et al.
patent: 2002/0192972 (2002-12-01), Narita et al.
patent: 0272 140 (1987-12-01), None
patent: 07-302765 (1995-11-01), None
patent: 09-232298 (1997-09-01), None
patent: 1998-0134853 (1998-01-01), None
patent: 1999-0066366 (1999-08-01), None
Samsung Electronics Co,. Ltd.
Trinh Michael
Volentine & Whitt PLLC
LandOfFree
Method for forming PE-TEOS layer of semiconductor integrated... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for forming PE-TEOS layer of semiconductor integrated..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for forming PE-TEOS layer of semiconductor integrated... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3782428