Memory device having off-chip driver enable circuit and...

Details Memory device having off-chip driver enable circuit and... Memory device having off-chip driver enable circuit and...

2007-05-29

2007-05-29

Ho, Hoai V. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

C365S191000, C365S194000

Reexamination Certificate

active

11073523

ABSTRACT:
A memory device capable of performing a read operation includes: a memory array that stores data; and off-chip drivers that supply as an output of the memory device data retrieved from the memory array. At least one of the off-chip drivers includes: an enable circuit that generates an enable signal in response to a read enable signal received by the off-chip driver, wherein the enable circuit controls the timing of the enable signal in accordance with a timing signal supplied to the enable circuit; and a driver circuit that drives the data off the memory device in response to the enable signal.

REFERENCES:
patent: 6243797 (2001-06-01), Merritt
patent: 6842815 (2005-01-01), Yim et al.

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