Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2007-07-10
2007-07-10
Tu, Christine T. (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
Reexamination Certificate
active
11151575
ABSTRACT:
There is provided a burn-in monitor for testing modules on an Integrated Circuit (IC), and a corresponding method. The burn-in monitor comprises: a Serial Test and Configuration Interface STCI for controlling and observing modules through a scan chain; a scan-in pin for loading a prepared set of test vectors; and a scan-out pin associated with the STCI for outputting all status bits. A burn-in mode is provided on the STCI and is selectable during testing for configuring the scan chain, such that said scan chain contains only those status bits required for monitoring burn-in, plus a number of bits necessary for controlling overall behaviour of the scan chain whereby the scan elements associated with the control bits will be loaded with zero. Hence the scan-out pin will show a one if there is a fault. Preferably the scan chain contains the minimum number of control bits necessary for controlling overall behaviour of the scan chain.
REFERENCES:
patent: 6437590 (2002-08-01), Tatsumi
patent: 6885599 (2005-04-01), Saitoh et al.
patent: 2002/0083389 (2002-06-01), Grisenthwaite
patent: 2003/0149913 (2003-08-01), Balachandran et al.
patent: 2003/0167429 (2003-09-01), Krause et al.
Brady III W. James
Kempler William B.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
Tu Christine T.
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