Precharge circuit and method employing inactive weak...

Static information storage and retrieval – Read/write circuit – Precharge

Reexamination Certificate

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Details

C365S154000, C365S205000, C365S191000, C365S063000

Reexamination Certificate

active

10999402

ABSTRACT:
Disclosed are a precharge circuit employing an inactive weak precharging and equalizing scheme, a memory device including the same and a precharging method. The inactive weak precharging and equalizing scheme equalizes a non-selected bit line and complementary bit line while sensing and amplifying memory cell data delivered to a selected bit line and complementary bit line to evaluate the voltage difference between the selected bit line and complementary bit line. Then, the scheme precharges the selected bit line and complementary bit line and the non-selected bit line and complementary bit line. This does not require high precharge driving capability for inactivated bit line and complementary bit line equalized to a predetermined voltage level so that precharge current and operating current can be reduced.

REFERENCES:
patent: 4658381 (1987-04-01), Reed et al.
patent: 5818773 (1998-10-01), Takahashi
patent: 5963470 (1999-10-01), Sato
patent: 6075733 (2000-06-01), Brown
patent: 2002/0172070 (2002-11-01), Arimoto et al.
patent: 2003/0021168 (2003-01-01), Ishida et al.
patent: 2003/0026124 (2003-02-01), Nagaoka
patent: 2005/0135169 (2005-06-01), Somasekhar et al.
patent: 7-211073 (1995-08-01), None
patent: 98-080431 (1998-11-01), None

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