Dual-edge triggered multiplexer flip-flop and method

Details Dual-edge triggered multiplexer flip-flop and method Dual-edge triggered multiplexer flip-flop and method

2007-01-09

2007-01-09

Nguyen, Van Thu (Department: 2824)

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

C365S230080, C365S230020

Reexamination Certificate

active

10990119

ABSTRACT:
A dual edge multiplexing flip-flop comprises a first circuit block having a first data input, a first clock signal input, a supply voltage input, and a ground connection; a second circuit block having a second data input, a second clock signal input, a supply voltage input, and a ground connection. Each circuit block is coupled to a common output node. When a common clock signal is input into the clock signal inputs, each circuit block outputs a floating voltage during one half of each clock cycle and a voltage indicative of a corresponding data input signal during the other half of each clock cycle.

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