Test structures in unused areas of semiconductor integrated...

Details Test structures in unused areas of semiconductor integrated... Test structures in unused areas of semiconductor integrated...

2007-05-29

2007-05-29

Zarneke, David A. (Department: 2891)

Semiconductor device manufacturing: process

With measuring or testing

Electrical characteristic sensed

C257S048000, C257SE21531, C257SE21523

Reexamination Certificate

active

10862049

ABSTRACT:
The present invention is test structures in unused areas of semiconductor integrated circuits and methods for designing the same. In an exemplary aspect of the present invention, a method for placing test structures in a semiconductor integrated circuit includes: (a) detecting a dummy area in a semiconductor integrated circuit, the semiconductor integrated circuit including probe pads on a top metal layer; (b) filling the dummy area with active test cells, the active test cells being connected to one another; and (c) connecting each of the active test cells to the probe pads with a metal line.

REFERENCES:
patent: 5981302 (1999-11-01), Alswede et al.
patent: 6146908 (2000-11-01), Falque et al.
patent: 6437364 (2002-08-01), Wu
patent: 6764879 (2004-07-01), Nagao et al.
patent: 6872583 (2005-03-01), Wu
patent: 6978407 (2005-12-01), Duan et al.

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