Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2007-05-15
2007-05-15
Clark, S. V. (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S700000
Reexamination Certificate
active
11109964
ABSTRACT:
A method for manufacturing a semiconductor component that inhibits formation of wormholes in a semiconductor substrate. A contact opening is formed in a dielectric layer disposed on a semiconductor substrate. The contact opening exposes a portion of the semiconductor substrate. A sacrificial layer of oxide is formed on the exposed portion of the semiconductor substrate and along the sidewalls of the contact opening. Silane is reacted with tungsten hexafluoride to form a hydrofluoric acid vapor and tungsten. The hydrofluoric acid vapor etches away the sacrificial oxide layer and a thin layer of tungsten is formed on the exposed portion of the semiconductor substrate. After forming the thin layer of tungsten, the reactants may be changed to more quickly fill the contact opening with tungsten.
REFERENCES:
patent: 6573168 (2003-06-01), Kim et al.
patent: 6599794 (2003-07-01), Kiyotoshi et al.
patent: 6635965 (2003-10-01), Lee et al.
patent: 6709904 (2004-03-01), Chaudhry et al.
patent: 6781180 (2004-08-01), Martin et al.
patent: 6917076 (2005-07-01), Eguchi et al.
patent: 6995073 (2006-02-01), Liou
patent: 2002/0086111 (2002-07-01), Byun et al.
patent: 2003/0049931 (2003-03-01), Byun et al.
patent: 2003/0082910 (2003-05-01), Walsh
patent: 2004/0127017 (2004-07-01), Jung et al.
patent: 2004/0142557 (2004-07-01), Levy et al.
patent: 2004/0202786 (2004-10-01), Wongsenakhum et al.
patent: 2005/0000431 (2005-01-01), Elers
patent: 2005/0009325 (2005-01-01), Chung et al.
patent: 2005/0023516 (2005-02-01), Chopra
patent: 2005/0031786 (2005-02-01), Lee et al.
patent: 2005/0035409 (2005-02-01), Ko et al.
patent: 2005/0035460 (2005-02-01), Tseng
patent: 2005/0046028 (2005-03-01), Jung
Novellus Ships 100thALTUS® PNL™ Module for Tungsten Deposition, 300-mm Tool destined for major Korean DRAM production fab, Sep. 23, 2004, Novellus Press Release, pp. 1-2.
Novellus Launches ALTUS® Directfill™ Tungsten Nitride/Tungsten Deposition System for 65 NM and Below, Breakthrough single-platform architecture for advanced contact and via-fill improves device performance; cuts overall CoO; Nov. 24, 2004, Novellus Press Release, pp. 1-2.
Besser Paul R.
Ngo Minh Van
Pham Hieu T.
Wang Connie Pin-Chin
Yin Jinsong
Advanced Micro Devices , Inc.
Clark S. V.
Farjami & Farjami LLP
Spansion LLC
LandOfFree
Method for manufacturing a semiconductor component that... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for manufacturing a semiconductor component that..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for manufacturing a semiconductor component that... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3746168