Method for the production of a memory cell, memory cell and...

Details Method for the production of a memory cell, memory cell and... Method for the production of a memory cell, memory cell and...

2007-03-27

2007-03-27

Lee, Calvin (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257S321000

Reexamination Certificate

active

10999810

ABSTRACT:
Memory cell having an auxiliary substrate, on which a first gate insulating layer is formed, a floating gate formed on the first gate insulating layer, an electrically insulating layer formed on the floating gate, a memory gate electrode formed on the electrically insulating layer, a substrate fixed to the memory gate electrode, a second gate insulating layer formed on a part of a surface of the auxiliary substrate, which surface is uncovered by partially removing the auxiliary substrate, a read gate electrode formed on the second gate insulating layer, and two source/drain regions located essentially in a surface region of the remaining material of the auxiliary substrate that is free of the second gate insulating layer and the read gate electrode, a channel region located between the two source/drain regions, wherein the channel region at least partly laterally overlaps the floating gate and the read gate electrode.

REFERENCES:
patent: 5306935 (1994-04-01), Esquivel et al.
patent: 5446299 (1995-08-01), Acovic et al.
patent: 5751037 (1998-05-01), Aozasa et al.
patent: 5929479 (1999-07-01), Oyama
patent: 6136650 (2000-10-01), Lee
patent: 6252275 (2001-06-01), Aitken et al.
patent: 6271088 (2001-08-01), Liu et al.
Lin, X. et al.; “Opposite Side Floating Gate SOI FLASH Memory Cell”; Proceedings 2000 IEEE Hong Kong Electron Device Meeting, pp. 12-15.

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