Multi-mode hybrid ARQ scheme

Details Multi-mode hybrid ARQ scheme Multi-mode hybrid ARQ scheme

2007-01-16

2007-01-16

Lamarre, Guy (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C714S774000, C714S794000

Reexamination Certificate

active

10989177

ABSTRACT:
A method and apparatus for performing H-ARQ transmission is described herein. Bits received on a first transmission are stored and combined with the bits received on later transmissions thereby increasing the likelihood of a correct decoding on later transmissions. Additionally, a plurality of coding schemes (e.g., Convolutional Codes, Block Turbo Codes, Convolutional Turbo Codes, Low Density Party Check Codes, . . . , etc.) are utilized, with an information element being reserved to signal what form of H-ARQ is being utilized.

REFERENCES:
patent: 6308294 (2001-10-01), Ghosh et al.
patent: 6697784 (2004-02-01), Bacon et al.
patent: 6697986 (2004-02-01), Kim et al.
patent: 6697988 (2004-02-01), Kim et al.
patent: 6700867 (2004-03-01), Classon et al.
patent: 6738370 (2004-05-01), Östman
patent: 6987780 (2006-01-01), Wei et al.
patent: 2003/0016698 (2003-01-01), Chang et al.

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