Packet forwarding system having a control packet processor...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Direct memory accessing

Reexamination Certificate

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Details

C710S009000, C710S052000, C710S053000, C710S110000, C710S260000, C710S268000, C370S255000, C370S412000, C370S419000, C370S422000

Reexamination Certificate

active

10769775

ABSTRACT:
A control packet management device of a packet forwarding system has a packet queue having a plurality of queues to store a control packet as transmitted, a first processor to transmit said control packet stored in one queue of said plurality of queues to a host a by one-to-one interrupt, a second processor to divide said control packets stored in said one queue into groups of a predetermined size and transmit said control packets to said host in the group unit and by direct memory access (DMA), a third processor to discard a most common type of said control packets stored in said one queue, and a controller to control said first, second and third processors to selectively operate in accordance with an accumulation state of said control packets stored in said plurality of queues.

REFERENCES:
patent: 5530703 (1996-06-01), Liu et al.
patent: 6295573 (2001-09-01), Bailey et al.
patent: 6570884 (2003-05-01), Connery et al.

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