Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2006-08-01
2006-08-01
Kerveros, James C. (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S724000, C324S763010
Reexamination Certificate
active
07085977
ABSTRACT:
In one aspect of the invention, a semiconductor die includes a plurality of resistive elements operable to receive a voltage differential between at least two of the resistive elements. The semiconductor die also includes a test circuit coupled to at least three tap points along the resistive elements. The test circuit is operable to measure a voltage at at least two of the tap points. A difference in the voltages between the at least two tap points is proportional to a resistance of the one or more resistive elements between the at least two tap points.
REFERENCES:
patent: 5418453 (1995-05-01), Wise
patent: 6218848 (2001-04-01), Hembree et al.
patent: 6259267 (2001-07-01), Fujiwara
patent: 6677744 (2004-01-01), Long
Burgess C. Keith
Marshall Andrew
Sayala Madhu
Weinberger Charles D.
Brady III W. James
Keagy Rose Alyssa
Kerveros James C.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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