Protective layer in memory device and method therefor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S954000

Reexamination Certificate

active

07098107

ABSTRACT:
A method for protecting a non-volatile memory device, the method including forming a non-volatile memory device including a polycide structure formed over a non-conducting charge trapping layer, and forming a protective layer over at least a portion of the polycide structure, the protective layer being adapted to absorb electromagnetic wave energy having a wavelength shorter than visible light. A device constructed in accordance with the method is also disclosed.

REFERENCES:
patent: 3895360 (1975-07-01), Cricchi et al.
patent: 4016588 (1977-04-01), Ohya et al.
patent: 4017888 (1977-04-01), Christie et al.
patent: 4151021 (1979-04-01), McElroy
patent: 4173766 (1979-11-01), Hayes
patent: 4173791 (1979-11-01), Bell
patent: 4257832 (1981-03-01), Schwabe et al.
patent: 4306353 (1981-12-01), Jacobs et al.
patent: 4342149 (1982-08-01), Jacobs et al.
patent: 4360900 (1982-11-01), Bate
patent: 4380057 (1983-04-01), Kotecha et al.
patent: 4471373 (1984-09-01), Shimizu et al.
patent: 4521796 (1985-06-01), Rajkanan et al.
patent: 4527257 (1985-07-01), Cricchi
patent: 4630085 (1986-12-01), Koyama
patent: 4665426 (1987-05-01), Allen et al.
patent: 4667217 (1987-05-01), Janning
patent: 4742491 (1988-05-01), Liang et al.
patent: 4758869 (1988-07-01), Eitan et al.
patent: 4769340 (1988-09-01), Chang et al.
patent: 4780424 (1988-10-01), Holler et al.
patent: 4847808 (1989-07-01), Kobatake
patent: 4870470 (1989-09-01), Bass, Jr. et al.
patent: 4941028 (1990-07-01), Chen et al.
patent: 4992391 (1991-02-01), Wang
patent: 5021999 (1991-06-01), Kohda et al.
patent: 5075245 (1991-12-01), Woo et al.
patent: 5104819 (1992-04-01), Freiberger et al.
patent: 5120672 (1992-06-01), Mitchell et al.
patent: 5159570 (1992-10-01), Mitchell et al.
patent: 5168334 (1992-12-01), Mitchell et al.
patent: 5175120 (1992-12-01), Lee
patent: 5214303 (1993-05-01), Aoki
patent: 5305262 (1994-04-01), Yoneda
patent: 5311049 (1994-05-01), Tsuruta
patent: 5324675 (1994-06-01), Hayabuchi
patent: 5334555 (1994-08-01), Sugiyama et al.
patent: 5338954 (1994-08-01), Shimoji
patent: 5349221 (1994-09-01), Shimoji
patent: 5350710 (1994-09-01), Hong et al.
patent: 5359554 (1994-10-01), Odake et al.
patent: 5393701 (1995-02-01), Ko et al.
patent: 5394355 (1995-02-01), Uramoto et al.
patent: 5414693 (1995-05-01), Ma et al.
patent: 5418176 (1995-05-01), Yang et al.
patent: 5418743 (1995-05-01), Tomioka et al.
patent: 5422844 (1995-06-01), Wolstenholme et al.
patent: 5424567 (1995-06-01), Chen
patent: 5426605 (1995-06-01), Van Berkel et al.
patent: 5434825 (1995-07-01), Harari
patent: 5436481 (1995-07-01), Egawa et al.
patent: 5455793 (1995-10-01), Amin et al.
patent: 5467308 (1995-11-01), Chang et al.
patent: 5477499 (1995-12-01), Van Buskirk et al.
patent: 5496753 (1996-03-01), Sakurai et al.
patent: 5518942 (1996-05-01), Shrivastava
patent: 5523251 (1996-06-01), Hong
patent: 5553018 (1996-09-01), Wang et al.
patent: 5599727 (1997-02-01), Hakozaki et al.
patent: 5654568 (1997-08-01), Nakao
patent: 5656513 (1997-08-01), Wang et al.
patent: 5712814 (1998-01-01), Fratin et al.
patent: 5726946 (1998-03-01), Yamagata et al.
patent: 5760445 (1998-06-01), Diaz
patent: 5768192 (1998-06-01), Eitan
patent: 5787036 (1998-07-01), Okazawa
patent: 5793079 (1998-08-01), Georgescu et al.
patent: 5801076 (1998-09-01), Ghneim et al.
patent: 5812449 (1998-09-01), Song
patent: 5825686 (1998-10-01), Schmitt-Landsiedel et al.
patent: 5836772 (1998-11-01), Chang et al.
patent: 5841700 (1998-11-01), Chang
patent: 5847441 (1998-12-01), Cutter et al.
patent: 5864164 (1999-01-01), Wen
patent: 5870335 (1999-02-01), Khan et al.
patent: 5903031 (1999-05-01), Yamada et al.
patent: 5946558 (1999-08-01), Hsu
patent: 5963412 (1999-10-01), En
patent: 5973373 (1999-10-01), Krautschneider et al.
patent: 5991202 (1999-11-01), Derhacobian et al.
patent: 6011725 (2000-01-01), Eitan
patent: 6018186 (2000-01-01), Hsu
patent: 6020241 (2000-02-01), You et al.
patent: 6028324 (2000-02-01), Su et al.
patent: 6030871 (2000-02-01), Eitan
patent: 6034403 (2000-03-01), Wu
patent: 6034896 (2000-03-01), Ranaweera et al.
patent: 6063666 (2000-05-01), Chang et al.
patent: 6156149 (2000-12-01), Cheung et al.
patent: 6195196 (2001-02-01), Kimura et al.
patent: 6201282 (2001-03-01), Eitan
patent: 6337502 (2002-01-01), Eitan et al.
patent: 0751560 (1997-01-01), None
patent: 1073120 (2001-01-01), None
patent: 1297899 (1972-11-01), None
patent: 2157489 (1985-10-01), None
patent: 05021758 (1993-01-01), None
patent: 07193151 (1995-07-01), None
patent: 09162314 (1997-06-01), None
patent: WO 81/00790 (1981-03-01), None
patent: WO 96/25741 (1996-08-01), None
U.S. Appl. No. 08/902,890, filed Jul. 30, 1997, Eitan.
U.S. Appl. No. 08/905,286, filed Jul. 30, 1997, Eitan.
U.S. Appl. No. 09/348,720, filed Jul. 6, 1999, Eitan.
U.S. Appl. No. 09/413,408, filed Oct. 6, 1999, Eitan.
U.S. Appl. No. 09/536,125, filed Mar. 28, 2000, Eitan et al.
Chan et al., “A True Single-Transistor Oxide-Nitride-Oxide EEPROM Device,”IEEE Electron Device Letters, vol. EDL-8, No. 3, Mar. 1987.
Chang, J., “Non Volatile Semiconductor Memory Devices,”Proceedings of the IEEE, vol. 64 No. 7, pp. 1039-1059, Jul. 1976.
Eitan et al., “Hot-Electron Injection into the Oxide in n-Channel MOS Devices,”IEEE Transactions on Electron Devices, vol. ED-28, No. 3, pp. 328-340, Mar. 1981.
Glasser et al., “The Design and Analysis of VLSI Circuits,” Addison Wesley Publishing Co, Chapter 2, 1988.
Lee, H., “A New Approach For the Floating-Gate MOS NonVolatile Memory”,Applied Physics Letters, vol. 31, No. 7, pp. 475-476, Oct. 1977.
Ma et al., “A dual-bit Split-Gate EEPROM (DSG) Cell in Contactless Array for Single-Vcc High Density Flash Memories,” IEEE, pp. 3.5.1-3.5.4, 1994.
Ohshima et al., “Process and Device Technologies for 16Mbit Eproms with Large—Tilt—Angle implanted P-Pocket Cell,”IEEE, CH2865-4/90/0000-0095, pp. 5.2.1-5.2.4, Dec. 1990.
Ricco, Bruno et al., “Nonvolatile Multilevel Memories for Digital Application,”IEEE, vol. 86, No. 12, pp. 2399-2421, Dec. 1998.
Roy, Anirban “Characterization and Modeling of Charge Trapping and Retention in Novel Multi-Dielectric Nonvolatile Semiconductor Memory Devices,” Doctoral Dissertation, Sherman Fairchild Center, Department of Computer Science and Electrical Engineering, pp. 1-35, 1989.
“2 Bit/Cell EEPROM Cell Using Band-To-Band Tunneling For Data Read-Out,”IBM Technical Disclosure Bulletin, U.S. IBM Corp. NY vol. 35, No. 4B, ISSN:0018-8689, Sep. 1992.
Tseng, Hsing-Huang et al., “Thin CVD Stacked Gate Dielectric for ULSI Technology”,IEEE, 0-7803-1450-6, 1993.
Pickar, K.A., “Ion Implantation in Silicon,”Applied Solid State Science, vol. 5, R. Wolfe Edition, Academic Press, New York, 1975.
Bhattacharyya et al., “FET Gate Structure for Nonvolatile N-Channel Read-Mostly Memory Device,”IBM Technical Disclosure Bulletin, U.S. IBM Corp. vol. 18, No. 6, p. 1768, Nov. 1975.
Bude et al., “EEPROM/Flash Sub 3.0 V Drain-Source Bias Hot carrier Writing”,IEDM95, pp. 989-992.
Bude et al., “Secondary Electroon Flash—a High Performance, Low Power Flash Technology for 0.35 um and Below”,IEDM97, pp. 279-282.
Bude et al., “Modeling Nonequilibrium Hot Carrier Device Effects”,Conference of Insulator Specialists of Europe, Sweden, Jun. 1997.

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