Self-aligned, silicided, trench-based, DRAM/EDRAM processes...

Details Self-aligned, silicided, trench-based, DRAM/EDRAM processes... Self-aligned, silicided, trench-based, DRAM/EDRAM processes...

2006-12-26

2006-12-26

Fourson, George R. (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S244000, C438S246000, C438S386000, C438S387000, C438S389000, C438S391000

Reexamination Certificate

active

07153737

ABSTRACT:
A DRAM cell in a substrate has a deep trench (DT) extending from a surface of the substrate into the substrate, a word line (WL) formed on the surface of the substrate adjacent the deep trench, and oxide (TTO) disposed in a top portion of the trench and extending beyond the trench in the direction of the word line. In this manner, when silicided, there is oxide rather than silicon on the surface of the substrate in a gap between the word line (WL) and a passing word line (PWL) disposed above the deep trench.

REFERENCES:
patent: 6440794 (2002-08-01), Kim
patent: 6452224 (2002-09-01), Mandelman et al.
patent: 6759702 (2004-07-01), Radens et al.
patent: 6815749 (2004-11-01), Mandelman et al.
patent: 6909137 (2005-06-01), Divakaruni et al.

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