Off-pitch column redundancy using dynamic shifters

Details Off-pitch column redundancy using dynamic shifters Off-pitch column redundancy using dynamic shifters

2006-11-07

2006-11-07

Ton, David (Department: 2138)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Replacement of memory spare location, portion, or segment

C714S710000

Reexamination Certificate

active

07134057

ABSTRACT:
An apparatus and method for controlling and providing off-pitch shifting circuitry for implementing column redundancy in a multiple-array memory is described in connection with an on-board cache memory integrated with a microprocessor. Depending upon the particular sub-array being accessed, shift position data is provided to a shared, off-pitch shift circuit to control the read and/or write operations for the memory. A register bank stores data identifying the defective columns which is compared to the incoming address information to detect any matches. In response to a match, control information is provided to the off-pitch shift circuit for shifting or re-routing the incoming data to a non-defective address in the memory. In this way, defective columns located in different positions in each sub-array can be replaced by redundant paths, thereby repairing the cache and increasing the manufacturing yield of microprocessors with an on-board cache memory.

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