Method of fabricating non-volatile memory

Details Method of fabricating non-volatile memory Method of fabricating non-volatile memory

2006-12-05

2006-12-05

Booth, Richard A. (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S954000

Reexamination Certificate

active

07144774

ABSTRACT:
A method of fabricating a non-volatile memory includes providing a substrate having a composite dielectric layer, a sacrificial layer and a mask layer sequentially formed thereon. The mask layer is patterned to form a plurality of first openings for exposing a portion of the sacrificial layer. The sacrificial layer exposed by the first openings is removed and a plurality of first gates is formed in the first openings. The mask layer is further removed to form a plurality of second openings between the first gates. An insulating layer is formed on the tops and sidewalls of the first gates. A portion of the sacrificial layer exposed by the second openings is removed and a plurality of second gates is formed in the second openings. The second gates and the first gates embody a memory cell column. Source/region regions are formed in the substrate beside the memory cell column.

REFERENCES:
patent: 5330924 (1994-07-01), Huang et al.
patent: 6008087 (1999-12-01), Wu

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