Method of fabricating a MOS structure with two conductive...

Details Method of fabricating a MOS structure with two conductive... Method of fabricating a MOS structure with two conductive...

2006-05-30

2006-05-30

Brewster, William M. (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S257000, C438S258000, C438S263000, C438S270000, C438S761000

Reexamination Certificate

active

07052954

ABSTRACT:
A gate electrode <13> is provided to fill up a trench <300> while covering its opening. Assuming that WGrepresents the diameter (sectional width) of a head portion of the gate electrode <13> located upward beyond a P-type base layer <4> and an N+-type emitter diffusion layer <51>, WTrepresents the diameter (sectional width) of an inner wall of a linearly extending portion of the trench <300> and WCrepresents the distance between the boundary (the inner wall of the trench300) between a gate oxide film <11> and the P-type base layer <4> and an end surface of the gate electrode <13> located upward beyond the trench <300> in a section of the trench <300>, relation of either WG≧1.3·WTor WC≧0.2 μm holds between these dimensions.

REFERENCES:
patent: 5635416 (1997-06-01), Chen et al.
patent: 5723377 (1998-03-01), Torii
patent: 5744395 (1998-04-01), Shue et al.
patent: 5783491 (1998-07-01), Nakamura et al.
patent: 6025634 (2000-02-01), Teong
patent: 7-45824 (1995-02-01), None
patent: 7-263692 (1995-10-01), None

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