Method of forming a nanocluster charge storage device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S962000, C257SE21689

Reexamination Certificate

active

07091089

ABSTRACT:
In one embodiment, a method of forming a nanocluster charge storage device is provided. A first region of a semiconductor device is identified for locating one or more non-charge storage devices. A second region of the semiconductor device is identified for locating one or more charge storage devices. A gate oxide to be used as a gate insulator of the one or more non-charge storage devices is formed in the first region of the semiconductor device, and a nanocluster charge storage layer is subsequently formed in the second region of the semiconductor device. This may allow for improved integration of charge storage and non-charge storage devices. For example, since the nanoclusters are formed after formation of the gate oxide for the non-charge storage device, the nanoclusters are not exposed to an oxidizing ambient which could potentially reduce their size and increase the thickness of the underlying tunnel dielectric layer.

REFERENCES:
patent: 6297095 (2001-10-01), Muralidhar et al.
patent: 6320784 (2001-11-01), Muralidhar et al.
patent: 6339002 (2002-01-01), Chan et al.
patent: 6444545 (2002-09-01), Sadd et al.
patent: 6580132 (2003-06-01), Chan et al.
patent: 6958265 (2005-10-01), Steimle et al.
patent: 2004/0038492 (2004-02-01), Okazaki et al.
patent: 2004/0135204 (2004-07-01), Wang et al.
patent: 2004/0212019 (2004-10-01), Shinohara et al.
Cavins et al., “A Nitride-Oxide Blocking Layer for Scaled SONOS Non-Volatile Memory,”Motorola, Inc., Jan. 10, 2002, 5 pages.
Cavins et al., “Integrated Stacked Gate Oxide and Interpoly Oxide,”Motorola, Inc., Nov. 1996, pp. 93-94.
Wolf, Ph.D., S.; “Endpoint-Detection in CMP”; Silicon Processing for the VLSI Era; Title pg & pp. 385-387; vol. 4: Deep Submicron Process Technology; Lattice Press, Sunset Beach, CA, no date.
Solomon, P.M. et al.; “Two Gates Are Better Than One”; IEEE Circuits & Devices Magazine; Jan., 2003; pp. 48-62; IEEE.
Blosse, A.; “PVD Aluminum Dual Damascene Interconnection: Yield Comparison between Counterbore and Self Aligned Approaches”; IITC; 1999; pp. 215-218; IEEE.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method of forming a nanocluster charge storage device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of forming a nanocluster charge storage device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of forming a nanocluster charge storage device will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3630030

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.