Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-02-28
2006-02-28
Tsai, H. Jey (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S253000, C438S396000
Reexamination Certificate
active
07005343
ABSTRACT:
A semiconductor device including an MIM capacitor is provided. A first metal wiring layer is patterned together with a first hard mask member and forms a lower capacitor electrode. A second metal wiring layer is formed on the first metal wiring layer with a capacitor insulating film therebetween and is patterned together with a protection layer and a second hard mask member which remains under the first hard mask member. The second metal wiring layer forms a plurality of upper capacitor electrodes. A third metal wiring layer connected with the first or second metal wiring layer is patterned on an insulating film. The third metal wiring layer includes a connection with a plug wiring member provided within a first or second contact hole.
REFERENCES:
patent: 2003/0011043 (2003-01-01), Roberts
patent: 10-004086 (1998-01-01), None
patent: 11-289049 (1999-10-01), None
patent: 2001-024157 (2001-01-01), None
patent: 2002-026020 (2002-01-01), None
patent: 2002-280528 (2002-09-01), None
patent: 2003-158190 (2003-05-01), None
Harness & Dickey & Pierce P.L.C.
Seiko Epson Corporation
LandOfFree
Semiconductor device and method of manufacturing the same does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device and method of manufacturing the same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and method of manufacturing the same will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3629944