Dual damascene with bond pads

Details Dual damascene with bond pads Dual damascene with bond pads

1997-12-23

2000-03-07

Niebling, John F.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438672, 438674, H01L 214763

Patent

active

060339845

ABSTRACT:
An improved method of forming a bond pad (222) by performing a dual damascene etch through a layer stack (200) disposed above a substrate (204) using self aligned vias (216). The layer (200) stack includes an underlying conductive layer (208) and an insulating layer (202) disposed above the underlying conductive layer (208). The method includes the following operative steps. At least a via hole (216) is formed in the insulating layer (202) positioned over the underlying device layer (208) and extending to the underlying device layer (208) at the bottom of the via hole. A bond pad trench (218) is then formed that takes the form of the desired bond pad (222). A layer of conductive material (220) is then placed over the insulating layer (202) substantially simultaneously filling the via hole (216) and the bond pad trench (218). The bond pad (222) is then formed by removing the layer of conductive material (220) sufficient to expose the upper surface of the insulating layer (210).

REFERENCES:
patent: 4057659 (1977-11-01), Pammer et al.
patent: 5534460 (1996-07-01), Tseng et al.
patent: 5578523 (1996-11-01), Fiordalice et al.
patent: 5739563 (1998-04-01), Kawakubo et al.
patent: 5773363 (1998-06-01), Derderian et al.
patent: 5780337 (1998-07-01), Huang
patent: 5877076 (1999-03-01), Dai

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