Leadless semiconductor package

Details Leadless semiconductor package Leadless semiconductor package

2006-09-05

2006-09-05

Malsawma, Lex H. (Department: 2823)

Active solid-state devices (e.g., transistors, solid-state diode

Encapsulated

With specified encapsulant

C257S779000

Reexamination Certificate

active

07102241

ABSTRACT:
A leadless semiconductor package disposed on a substrate includes a chip, a plurality of leads, wherein each lead has a metal layer and a first molding compound formed on the metal layer, a second molding compound disposed on the first molding compound, and a chip paddle for carrying the chip. The leads are connected to the chip by wire bonding technique. The metal layer is exposed out of the first molding compound; and the second molding compound encapsulates the chip with the chip paddle exposed out of the second molding compound.

REFERENCES:
patent: 5331205 (1994-07-01), Primeaux
patent: 6211574 (2001-04-01), Tao et al.
patent: 6373116 (2002-04-01), Teranuma et al.
patent: 2001/0022404 (2001-09-01), Yamamoto et al.
patent: 2004/0135121 (2004-07-01), Toyoda et al.

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