Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2006-04-25
2006-04-25
Deo, Duy-Vu N. (Department: 1765)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S670000, C438S671000
Reexamination Certificate
active
07033936
ABSTRACT:
A method of fabricating electronic, optical or magnetic devices requiring an array of large numbers of small features in which regions defining individual features of the array are formed by the steps of: (a) depositing a very thin film of a highly soluble solid onto a flat hydrophilic substrate; (b) exposing the film to solvent vapor under controlled conditions so that the film reorganizes into an array of discrete hemispherical islands on the surface; (c) depositing a film of a suitable resist material over the whole surface; (d) removing the hemispherical structures together with their coating of resist leaving a resist layer with an array of holes corresponding to the islands; and (e) subjecting the resulting structure to a suitable etching process so as to form a well at the position of each hole. The wells which are formed by this process may be used to fabricate various types of devices, including arrays of semiconductor devices, and crystalline heterostructures in which the lattice constants of the component materials are different.
REFERENCES:
patent: 6153010 (2000-11-01), Kiyoku et al.
Haginoya et al., “Nanostructure array fabrication with a size-controllable natural lithography”, 1997, p. 2934-2936.
Green et al., “Quantum pillar structures on n+ gallium arsenide fabricated using ‘natural’ lithography”, 1993, pp. 264-266.
Deo Duy-Vu N.
Imperial Innovations Limited
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