Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2006-07-25
2006-07-25
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S680000, C438S685000, C438S653000, C438S656000
Reexamination Certificate
active
07081409
ABSTRACT:
In a method for forming a gate electrode, a dielectric layer having a high dielectric constant is formed on a substrate. Tantalum amine derivatives represented by a chemical formula Ta(NR1)(NR2R3)3in which R1, R2and R3represent H or C1–C6alkyl group are introduced onto the dielectric layer to form a tantalum nitride layer. A capacitor metal layer or a gate metal layer is formed on the tantalum nitride layer. The capacitor metal layer or the gate metal layer and the tantalum nitride layer are patterned to form a capacitor electrode or a gate electrode. The tantalum amine derivatives are used in forming a dual gate electrode.
REFERENCES:
patent: 5316982 (1994-05-01), Taniguchi
patent: 5668021 (1997-09-01), Subramanian et al.
patent: 5668054 (1997-09-01), Sun et al.
patent: 6153519 (2000-11-01), Jain et al.
patent: 6168991 (2001-01-01), Choi et al.
patent: 6203613 (2001-03-01), Gates et al.
patent: 6204204 (2001-03-01), Paranjpe et al.
patent: 6221712 (2001-04-01), Huang et al.
patent: 6357901 (2002-03-01), Grossman et al.
patent: 6368923 (2002-04-01), Huang
patent: 6492217 (2002-12-01), Bai et al.
patent: 6504214 (2003-01-01), Yu et al.
patent: 6537901 (2003-03-01), Cha et al.
patent: 6607958 (2003-08-01), Suguro
patent: 6727148 (2004-04-01), Setton
patent: 2002/0104481 (2002-08-01), Chiang et al.
patent: 2002/0144657 (2002-10-01), Chiang et al.
patent: 2002193981 (2002-08-01), None
patent: 1020030009093 (2003-01-01), None
Choi Gil-Heyun
Choi Kyung-In
Kang Sang-Bom
Lee Jong-Myeong
Lee Sang-Woo
Fourson George
Maldonado Julio
Samsung Electronics Co,. Ltd.
LandOfFree
Methods of producing integrated circuit devices utilizing... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Methods of producing integrated circuit devices utilizing..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods of producing integrated circuit devices utilizing... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3569956