Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2006-09-05
2006-09-05
Pham, Long (Department: 2814)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S108000, C438S109000, C438S110000, C438S118000, C361S767000
Reexamination Certificate
active
07101730
ABSTRACT:
A method of manufacturing a stackable package to create a 3-dimensional memory array using ball grid array technology. Specifically, memory chips are coupled to a preformed packages which have alignment features to allow for the stacking of the ball grid arrays. The alignment features are used to align and orient each package with respect to an adjacent package, substrate or printed circuit board. The alignment features also support the weight of the adjacent package during solder ball reflow to maintain stack height and parallelism between packages. Each memory device is serially connected to the adjacent memory device through the vias and solder balls on each package.
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Baerlocher Cary J.
Bolken Todd O.
Cobbley Chad A.
Corisis David J.
Fletcher Yoder
Pham Long
Rao Shrinivas H
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