Compact system module with built-in thermoelectric cooling

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support

Reexamination Certificate

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C438S540000, C438S715000, C257S717000, C257S719000, C257S930000

Reexamination Certificate

active

07022553

ABSTRACT:
An improved integrated circuit package for providing built-in heating or cooling to a semiconductor chip is provided. The improved integrated circuit package provides increased operational bandwidth between different circuit devices, e.g. logic and memory chips. The improved integrated circuit package does not require changes in current CMOS processing techniques. The structure includes the use of a silicon interposer. The silicon interposer can consist of recycled rejected wafers from the front-end semiconductor processing. Micro-machined vias are formed through the silicon interposer. The micro-machined vias include electrical contacts which couple various integrated circuit devices located on the opposing surfaces of the silicon interposer. The packaging includes a Peltier element.

REFERENCES:
patent: 3923567 (1975-12-01), Lawrence
patent: 3959047 (1976-05-01), Alberts et al.
patent: 3982268 (1976-09-01), Anthony et al.
patent: 4081701 (1978-03-01), White, Jr. et al.
patent: 4394712 (1983-07-01), Anthony
patent: 4595428 (1986-06-01), Anthony et al.
patent: 4631636 (1986-12-01), Andrews
patent: 4653025 (1987-03-01), Minato et al.
patent: 4710798 (1987-12-01), Marcantonio
patent: 4739446 (1988-04-01), Landis
patent: 4811082 (1989-03-01), Jacobs et al.
patent: 4870470 (1989-09-01), Bass, Jr. et al.
patent: 4935864 (1990-06-01), Schmidt et al.
patent: 4977439 (1990-12-01), Esquivel et al.
patent: 5061987 (1991-10-01), Hsia
patent: 5079618 (1992-01-01), Farnworth
patent: 5153814 (1992-10-01), Wessely
patent: 5229327 (1993-07-01), Farnworth
patent: 5258648 (1993-11-01), Lin
patent: 5258658 (1993-11-01), Morikawa
patent: 5275001 (1994-01-01), Yokotani et al.
patent: 5313361 (1994-05-01), Martin
patent: 5317197 (1994-05-01), Roberts
patent: 5343366 (1994-08-01), Cipolla et al.
patent: 5352998 (1994-10-01), Tamino
patent: 5362976 (1994-11-01), Suzuki
patent: 5371654 (1994-12-01), Beaman et al.
patent: 5391917 (1995-02-01), Gilmour et al.
patent: 5392407 (1995-02-01), Heil et al.
patent: 5409547 (1995-04-01), Watanabe et al.
patent: 5415699 (1995-05-01), Harman
patent: 5419780 (1995-05-01), Suski
patent: 5432823 (1995-07-01), Gasbarro et al.
patent: 5438224 (1995-08-01), Papageorge et al.
patent: 5457342 (1995-10-01), Herbst, II
patent: 5468681 (1995-11-01), Pasch
patent: 5532506 (1996-07-01), Tserng
patent: 5567654 (1996-10-01), Beilstein, Jr. et al.
patent: 5587119 (1996-12-01), White
patent: 5598031 (1997-01-01), Groover et al.
patent: 5610366 (1997-03-01), Fleurial et al.
patent: 5618752 (1997-04-01), Gaul
patent: 5622875 (1997-04-01), Lawrence
patent: 5637828 (1997-06-01), Russell et al.
patent: 5637921 (1997-06-01), Burward-Hoy
patent: 5646067 (1997-07-01), Gaul
patent: 5656548 (1997-08-01), Zavracky et al.
patent: 5657481 (1997-08-01), Farmwald et al.
patent: 5682062 (1997-10-01), Gaul
patent: 5692558 (1997-12-01), Hamilton et al.
patent: 5699291 (1997-12-01), Tsunemine
patent: 5714791 (1998-02-01), Chi et al.
patent: 5724818 (1998-03-01), Iwata et al.
patent: 5747728 (1998-05-01), Fleurial et al.
patent: 5753529 (1998-05-01), Chang et al.
patent: 5767001 (1998-06-01), Bertagnolli et al.
patent: 5781746 (1998-07-01), Fleck
patent: 5786628 (1998-07-01), Beilstein, Jr. et al.
patent: 5807783 (1998-09-01), Gaul et al.
patent: 5821624 (1998-10-01), Pasch
patent: 5824561 (1998-10-01), Kishi et al.
patent: 5834799 (1998-11-01), Rostoker et al.
patent: 5855735 (1999-01-01), Takada et al.
patent: 5861666 (1999-01-01), Bellaar
patent: 5887435 (1999-03-01), Morton
patent: 5901050 (1999-05-01), Imai
patent: 5902118 (1999-05-01), Hubner
patent: 5903045 (1999-05-01), Bertin et al.
patent: 5915167 (1999-06-01), Leedy
patent: 5977479 (1999-11-01), Tokuda et al.
patent: 5990550 (1999-11-01), Umezawa
patent: 5991161 (1999-11-01), Samaras et al.
patent: 6016256 (2000-01-01), Crane, Jr. et al.
patent: 6137164 (2000-10-01), Yew et al.
patent: 6150724 (2000-11-01), Wenzel et al.
patent: 6223273 (2001-04-01), Kanekawa et al.
patent: 6281042 (2001-08-01), Ahn et al.
patent: 6821802 (2004-11-01), Ahn et al.
patent: 6829149 (2004-12-01), Chang et al.
patent: 2002/0081774 (2002-06-01), Liang et al.
patent: 02142170 (1990-05-01), None
patent: 4-133472 (1992-05-01), None
patent: 05-129666 (1993-05-01), None
patent: 05129666 (1993-05-01), None
patent: 406077366 (1994-03-01), None
patent: 08031994 (1996-02-01), None
patent: 408070070 (1996-03-01), None
patent: WO-94/05039 (1994-03-01), None
Beddingfield, C., et al., “Flip Chip Assembly of Motorola Fast Static RAM Known Good Die”,1997 Proceedings, 47th Electronic Components and Technology Conference, San Jose, CA, (May 18-21, 1997), 643-648.
Blalock, T. N., et al., “A High-Speed Clamped Bit-Line Current-Mode Sense Amplifier”, IEEE Journal of Solid-State Circuits, 26(4), (Apr. 1991), 542-548.
Cao, L., et al., “A Novel “Double-Decker” Flip-Chip/BGA Package for Low Power Giga-Hertz Clock Distribution”,1997 Proceedings, 47th Electronic Components and Technology Conference, San Jose, CA, (May 18-21, 1997), 1152-1157.
Crisp, R., “Development of Single-Chip Multi-GB/s DRAMs”,Digest of International Solid-State Circuits Conference, (1997), 226-227.
Crisp, R., “Rambus Technology, the Enabler”,Conference Record of WESCON, Anaheim, CA, (Nov. 17-19, 1992), 160-165.
Demmin, J., “nCHIP's Silicon Circuit Board Technology”,National Electronic Packaging and Production Conference, NEPCON West 94, 3, Proceedings of the Technical Program, (1993), 2038-9.
Donnelly, K. S., et al., “A 660MB/s Interface Megacell Portable Circuit in -.3 mum-0.7 mum CMOS ASIC”,IEEE Journal of Solid-State Circuits, vol. 32, (Dec. 1996), 1995-2003.
Feinberg, I., et al., “Interposer for Chip-on-Chip Module Attachment”,IBM Technical Disclosure Bulletin, 26(9), (Feb. 1984), 4590-91.
Foster, R., et al., “High Rate Low-Temperature Selective Tungsten”,In: Tungsten and Other Refractory Metals for VLSI Applications III, V.A. Wells, ed., Materials Res. Soc., Pittsburgh, PA, (1998), 69-72.
Goodman, T., et al., “The Flip Chip Market”,Advanced Packaging, (Sep./Oct. 1997), 24-25.
Gray, P. R., et al., “Analysis and Design of Analog and Integrated Circuits”,John Wiley and Sons, 2nd ed., (1984), 617-622.
Heremans, P, et al., “Optoelectronic Integrated Receiver for Inter-MCM and Inter-Chip Optical Interconnects”,Technical Digest, International Electron Devices Meeting, (Dec. 1996), 657-660.
Horie, H., et al., “Novel High Aspect Ratio Aluminum Plug for Logic/DRAM LSI's Using Polysilicon-Aluminum Substitute”,Technical Digest: IEEE International Electron Devices Meeting, San Francisco, CA, (1996), 946-948.
Horowitz, M., et al., “PLL Design for a 500mbs Interface”,Dig. International Solid-State Circuits Conference, (1993), 160-161.
Huth, N., “Next-Generation Memories”,Electronik, 42(23), (1993), 36-44.
Krishnamoorthy, A. V., et al., “Ring Oscillators with Optical and Electrical Readout Based on Hybrid GaAs MQW Modulators Bonded to 0.8 Micron Silicon VLSI Cricuits”,Electronics Lett. 31(22), (Oct. 26, 1995), 1917-18.
Lee, T. H., et al., “A 2.5V Delay-Locked Loop for an 18Mb 500MB/s DRAM”,Digest of International Solid-State Circuits Conference, (1994), 300-301.
Lehmann, V., “The Physics of Macropore Formation in Low Doped n-Type Silicon”,Journal of the Electrochemical Society, 140(10), (Oct. 1993), 2836-2843.
Lin, C. M., et al., “Precision Embedded Thin Film Resistors for Multichip Modules (MCM-D)”,Proceedings IEEE Multichip Module Conference, (1997), 44-9.
Mimura, T., et al., “System Module: a New Chip-on-Chip Module Technology”,Proceedings of 1997 IEEE Custom Integrated Circuit Conference, (1997), 439-442.
Muller, K., et al., “Trench Storage Node Technology for Gigabit DRAM Generations”,Digest IEEE International Electron Devices Meeting, San Francisco, CA, (Dec. 1996), 507-510.
Ohba, T., et al., “Evaluation on Se

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