Stacked semiconductor chip package

Details Stacked semiconductor chip package Stacked semiconductor chip package

2006-04-04

2006-04-04

Whitehead, Jr., Carl (Department: 2813)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

C257S723000, C257S783000, C257S790000, C257S796000

Reexamination Certificate

active

07023079

ABSTRACT:
The present invention relates to a stacked semiconductor chip package comprising a substrate, a first chip, a plate, and a second chip The first chip is mounted on the substrate. The second chip comprises two opposed longitudinal sides defining a first length. The plate is mounted between the first chip and the second chip, and connects the first chip and the second chip. Corresponding to the two longitudinal sides of the second chip, the plate has two opposed longitudinal sides defining a second length. The second length is larger than the first length to expose the opposed longitudinal sides of the plate. An overflow adhesive portion is formed between the plate and the second chip, and the overflow adhesive portion exposes on the plate. Therefore, the testing instrument can detect the size of the overflow adhesive portion and the thickness of the adhesive layer so as to control the quality of the stacked semiconductor chip package. The adhesion strength between the stacked chip and the plate can be augmented to raise the reliability of the stacked semiconductor chip package product.

REFERENCES:
patent: 5323060 (1994-06-01), Fogal et al.
patent: 5366933 (1994-11-01), Golwalkar et al.
patent: 5448511 (1995-09-01), Paurus et al.
patent: 5861666 (1999-01-01), Bellaar
patent: 5894165 (1999-04-01), Ma et al.
patent: 6005778 (1999-12-01), Spielberger et al.
patent: 6025648 (2000-02-01), Takahashi et al.
patent: 6072243 (2000-06-01), Nakanishi
patent: 6118184 (2000-09-01), Ishio et al.
patent: 6160218 (2000-12-01), Azdasht et al.
patent: 6252305 (2001-06-01), Lin et al.
patent: 6340846 (2002-01-01), LoBianco et al.
patent: 6351028 (2002-02-01), Akram
patent: 6563205 (2003-05-01), Fogal et al.
patent: 6583512 (2003-06-01), Nakaoka et al.
patent: 6593662 (2003-07-01), Pu et al.
patent: 6650006 (2003-11-01), Huang et al.
patent: 6693350 (2004-02-01), Teshima et al.
patent: 6740970 (2004-05-01), Hiraoka et al.
patent: 6774473 (2004-08-01), Shen
patent: 2001/0008306 (2001-07-01), Kamei et al.
patent: 2001/0042863 (2001-11-01), Yamada et al.
patent: 2002/0175401 (2002-11-01), Huang et al.
patent: 60-130854 (1985-07-01), None
patent: 403109760 (1991-05-01), None
patent: 404056262 (1992-02-01), None

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