Method of forming FinFET gates without long etches

Details Method of forming FinFET gates without long etches Method of forming FinFET gates without long etches

2006-01-24

2006-01-24

Zarabian, Amir (Department: 2822)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S157000, C438S176000, C438S587000

Reexamination Certificate

active

06989308

ABSTRACT:
A method for forming a gate for a FinFET uses a series of selectively deposited sidewalls along with other sacrificial layers to create a cavity in which a gate can be accurately and reliably formed. This technique avoids long directional etching steps to form critical dimensions of the gate that have contributed to the difficulty of forming FinFETs using conventional techniques. In particular, a sacrificial seed layer, from which sidewalls can be accurately grown, is first deposited over a silicon fin. Once the sacrificial seed layer is etched away, the sidewalls can be surrounded by another disposable layer. Etching away the sidewalls will result in cavities being formed that straddle the fin, and gate conductor material can then be deposited within these cavities. Thus, the height and thickness of the resulting FinFET gate can be accurately controlled by avoiding a long direction etch down the entire height of the fin.

REFERENCES:
patent: 6605514 (2003-08-01), Tabery et al.
patent: 6709982 (2004-03-01), Buynoski et al.
patent: 6864164 (2005-03-01), Dakshina-Murthy et al.
patent: 6864519 (2005-03-01), Yeo et al.
patent: 6927104 (2005-08-01), Lee et al.

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