Lithography alignment and overlay measurement marks formed...

Radiation imagery chemistry: process – composition – or product th – Imaging affecting physical property of radiation sensitive... – Making electrical device

Reexamination Certificate

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C430S315000, C430S319000, C430S324000, C438S003000, C438S059000, C438S253000, C438S296000, C438S381000, C438S698000

Reexamination Certificate

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06979526

ABSTRACT:
A method of manufacturing a resistive semiconductor memory device (10), comprising depositing an insulating layer (34) over a workpiece (30), and defining a pattern for a plurality of alignment marks (22) and a plurality of conductive lines (54) within the insulating layer (34). A resist (50) is formed over the alignment marks (22), and a conductive material (52) is deposited over the wafer to fill the conductive pattern. The wafer is chemically-mechanically polished to remove excess conductive material from over the insulating layer and form conductive lines (54). The resist (50) is removed from over the alignment marks (22), and the alignment marks (22) are used for alignment of subsequently deposited layers of the resistive memory device (10).

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