Gate structure with independently tailored vertical doping...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S653000, C438S655000, C438S684000

Reexamination Certificate

active

06911384

ABSTRACT:
A gate structure for a semiconductor transistor is disclosed. In an exemplary embodiment, the gate structure includes a lower polysilicon region doped at a first dopant concentration and an upper polysilicon region doped at a second concentration, with the second concentration being different than the first concentration. A conductive barrier layer is disposed between the lower and the upper polysilicon regions, wherein the conductive barrier layer prevents diffusion of impurities between the lower and the upper polysilicon regions.

REFERENCES:
patent: 5796166 (1998-08-01), Agnello et al.
patent: 5885887 (1999-03-01), Hause et al.
patent: 5925918 (1999-07-01), Wu et al.
patent: 5998289 (1999-12-01), Sagnes
patent: 6208004 (2001-03-01), Cunningham
patent: 6259144 (2001-07-01), Gonzalez
patent: 6271590 (2001-08-01), Akram et al.
patent: 6274467 (2001-08-01), Gambino et al.
patent: 6281059 (2001-08-01), Cheng et al.
patent: 6291868 (2001-09-01), Weimer et al.
patent: 6310361 (2001-10-01), Lichter
patent: 6333244 (2001-12-01), Yu
patent: 6335248 (2002-01-01), Mandelman et al.
patent: 6372618 (2002-04-01), Forbes et al.
patent: 6380055 (2002-04-01), Gardner et al.
patent: 6404021 (2002-06-01), Koizumi et al.
patent: 6573169 (2003-06-01), Noble et al.
patent: 6611032 (2003-08-01), Schuegraf et al.
patent: 6713359 (2004-03-01), Mizushima et al.
patent: 6737320 (2004-05-01), Chen et al.
V. L. Rideout; “Fabricating Low Resistance Interconnection Lines and FET Gates in a Single Step;” IBM Technical Disclosure Bulletin, vol. 21, No. 3, Aug. 1978; pp. 1250-1251.
Mitra Navi and Scott T. Dunham; “Investigation of Boron Penetration Through Thin Gate Dielectrics Including Role of Nitrogen and Fluorine;” J. Electrochem. Soc., vol. 15, No. 7, Jul. 1998; pp. 2545-2458.
Richard B. Fair, “Modeling Boron Diffusion in Ultrathin Nitrided Oxide p+ Si Gate Technology;” IEEE Electron Device Letters, vol. 18, No. 6, Jun. 1997; pp. 244-247.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Gate structure with independently tailored vertical doping... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Gate structure with independently tailored vertical doping..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Gate structure with independently tailored vertical doping... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3503788

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.