Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate
2005-08-23
2005-08-23
Lam, David (Department: 2827)
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
C365S207000, C365S189090
Reexamination Certificate
active
06934197
ABSTRACT:
A method and circuit configuration for digitizing data and control signals using an input buffer in a dynamic random access memory (DRAM) device. In one embodiment, the input buffer includes buffer modules having a differential amplifier with a first input responsive to an input signal and a second input responsive to a reference voltage, a common source stage, and an output stage and a source of a bias voltage controlling impedance of the common source stage, wherein the reference voltage defines the amplitude of the bias voltage.
REFERENCES:
patent: 6424577 (2002-07-01), Sim
Infineon - Technologies AG
Lam David
Moser, Patterson & Sheridan L.L.P.
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