Method and system for allowing code to be securely...

Electrical computers and digital processing systems: support – Data processing protection using cryptography – By stored data protection

Reexamination Certificate

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C713S100000, C713S152000, C380S277000

Reexamination Certificate

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06938164

ABSTRACT:
A memory controller prevents CPUs and other I/O bus masters from accessing memory during a code (for example, trusted core) initialization process. The memory controller resets CPUs in the computer and allows a CPU to begin accessing memory at a particular location (identified to the CPU by the memory controller). Once an initialization process has been executed by that CPU, the code is operational and any other CPUs are allowed to access memory (after being reset), as are any other bus masters (subject to any controls imposed by the initiated code).

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