Semiconductor device having a memory cell region and a...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S257000

Reexamination Certificate

active

06849490

ABSTRACT:
To provide a semiconductor storage apparatus and a manufacturing method thereof in which a memory cell source area is not silicided and a resistance dispersion caused by insufficient silicidation is therefore eliminated, and in which a silicide film is prevented from being formed in the step portion of a self-aligned source structure and therefore a resistance dispersion by a disconnected silicide film is not generated. In a semiconductor storage apparatus having a memory cell portion in which a source area is formed by a self-aligned process, a silicide blocking portion is disposed in a part of the surface of a source diffusion layer such that the resistance dispersion caused by the insufficient silicidation of the source diffusion layer is not generated.

REFERENCES:
patent: 6037625 (2000-03-01), Matsubara et al.
patent: 6043537 (2000-03-01), Jun et al.
patent: 6339237 (2002-01-01), Nomachi et al.
patent: 6518618 (2003-02-01), Fazio et al.
patent: 08-330453 (1996-12-01), None

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