Methods and apparatus to correct duty cycle

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error count or rate

Reexamination Certificate

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C714S709000

Reexamination Certificate

active

06981185

ABSTRACT:
An apparatus for correcting duty cycle error is provided which includes circuitry capable of determining existence of a duty cycle error from input data received over data transmissions lines where the circuitry generates duty cycle correction data based on the duty cycle error. The apparatus also includes a digital analog converter (DAC) being coupled to the circuitry where the DAC is capable of receiving a magnitude portion of the duty cycle correction data from the circuitry. The apparatus further includes an adjustable bias driver being coupled to the circuitry, the DAC and the data transmission lines. The adjustable bias driver receives the magnitude portion of the duty cycle correction data from the DAC and receives a polarity portion of the duty cycle correction data from the circuitry where the adjustable bias driver adjusts the polarity of signals applied to the data transmission lines for correcting the duty cycle error.

REFERENCES:
patent: 4527075 (1985-07-01), Zbinden
patent: 4736391 (1988-04-01), Siegel
patent: 4996529 (1991-02-01), Connell
patent: 5614855 (1997-03-01), Lee et al.
patent: 5945862 (1999-08-01), Donnelly et al.
patent: 6034551 (2000-03-01), Bridgewater, Jr.

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