Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-03-22
2005-03-22
Tokar, Michael (Department: 2829)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S303000, C438S306000
Reexamination Certificate
active
06869842
ABSTRACT:
A non-volatile memory cell having a symmetric cell structure is disclosed. The non-volatile memory cell includes a substrate, a tunnel oxide layer, two floating gates, a dielectric layer, a plurality of spacers, a control gate, and two split gates. The substrate has at least two sources and a drain that is located between the sources. The floating gates are formed on the tunneling oxide layer, and each of floating gates is located between each source and the drain. The dielectric layer is formed on the floating gates. The control gate is formed over the drain and is between the floating gates. The split gates are located adjacent to outward sidewalls of the floating gates, respectively. Therefore, each of the split gates is opposite to the control gate through each of the floating gates.
REFERENCES:
patent: 6734055 (2004-05-01), Lin et al.
patent: 6740557 (2004-05-01), Lin
Chang Ko-Hsing
Hsu Cheng-Yuan
Geyer Scott B.
Hsu Winston
Powerchip Semiconductor Corp.
Tokar Michael
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