Method for receiver delay detection and latency minimization...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay

Reexamination Certificate

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Reexamination Certificate

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06954870

ABSTRACT:
A method of calibrating an elastic interface is provided to automatically achieve a minimal cycle delay through the interface. An existing self-alignment interface (i.e. elastic interface) is used to de-skew within a cycle and stage the data to have it arrive on a given, programmed target cycle. However, this target cycle must be calculated in advance and may be larger than it needs to be, causing more latency on the interface. This method is used to determine the earliest target cycle (with or without additional guard-band). This target cycle is used to adjust the interface automatically to achieve this earliest target cycle. The determination of earliest target cycle can be done once, continuously, or using a sample window. The method also can be used for interfaces that have frequency multipliers or phase shifts at its boundaries.

REFERENCES:
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patent: 5938180 (1999-08-01), Walsten
patent: 6334163 (2001-12-01), Dreps et al.
patent: 6654897 (2003-11-01), Dreps et al.
patent: 6766464 (2004-07-01), Collier
patent: 2003/0188046 (2003-10-01), Chen et al.

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