Semiconductor device and method of manufacturing the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S258000, C438S266000, C438S294000, C438S296000

Reexamination Certificate

active

06849502

ABSTRACT:
Reliability of a semiconductor device having a nonvolatile memory comprising first through third gate electrodes is enhanced. With a flash memory having first gate electrodes (floating gate electrodes), second gate electrodes (control gate electrodes) and third gate electrodes, isolation parts are formed in a self-aligned manner against patterns of a conductor film for forming the third gate electrodes by filling up the respective isolation grooves and a gate insulator film for select nMISes in a peripheral circuit region is formed prior to the formation of the isolation parts. By so doing, deficiency with the gate insulator film for the select nMISes, caused by stress occurring to the isolation parts, can be reduced. Further, with the semiconductor device including the case of stacked memory cells, the patterns of the conductor film for forming the third gate electrodes, serving as a mask for forming the isolation parts in the self-aligned manner, can be formed without misalignment against channels.

REFERENCES:
patent: 5095344 (1992-03-01), Harari
patent: 6060357 (2000-05-01), Lee
patent: 6638822 (2003-10-01), Chang
patent: 20020182806 (2002-12-01), Kim
patent: 20030017671 (2003-01-01), Lee et al.
patent: 2694618 (1989-06-01), None
Hitoshi Kume, “Flash Memory Technology”, Applied Physics, vol. 65, Nov. 1996, PP 1114-1124 (with English Translations of Tables 4, 5 and 6).

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