Sensing test circuit

Static information storage and retrieval – Read/write circuit – Testing

Reexamination Certificate

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Details

C365S149000, C365S189070

Reexamination Certificate

active

06885597

ABSTRACT:
A test circuit for testing differential read signals during a memory access is disclosed. The test circuit is coupled to a pair of bit lines. During a read access, a selected memory cell produces a differential read signal on the bit lines. When the test circuit is activated, the magnitude of the differential read signal is varied. This enables easy testing of read signal margins in, for example, memory ICs.

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