Strained silicon NMOS devices with embedded source/drain

Details Strained silicon NMOS devices with embedded source/drain Strained silicon NMOS devices with embedded source/drain

Filed on

2005-04-19

Date issued

2005-04-19

Examiner

Hu, Shouxiang (Department: 2811)

Patent Class

Semiconductor device manufacturing: process

SubClass

Making field effect device having pair of active regions...

SubSubClass

Having insulated gate

Other Related Categories

C438S299000, C438S303000, C438S489000

Type

Reexamination Certificate

Status

active

Patent number

06881635

Description

ABSTRACT:
A planar NFET on a strained silicon layer supported by a SiGe layer achieves reduced external resistance by removing SiGe material outside the transistor body and below the strained silicon layer and replacing the removed material with epitaxial silicon, thereby providing lower resistance for the transistor electrodes and permitting better control over Arsenic diffusion.

REFERENCES:
patent: 6063675 (2000-05-01), Rodder
patent: 6261911 (2001-07-01), Lee et al.
patent: 6303450 (2001-10-01), Park et al.
patent: 6326664 (2001-12-01), Chau et al.
patent: 6346447 (2002-02-01), Rodder
patent: 6346732 (2002-02-01), Mizushima et al.
patent: 6376318 (2002-04-01), Lee et al.
patent: 6403434 (2002-06-01), Yu
patent: 6406951 (2002-06-01), Yu
patent: 6406973 (2002-06-01), Lee
patent: 6440807 (2002-08-01), Ajmera et al.
patent: 6465313 (2002-10-01), Yu et al.
patent: 6489206 (2002-12-01), Chen et al.
patent: 6607948 (2003-08-01), Sugiyama et al.
patent: 6620664 (2003-09-01), Ma et al.
patent: 6657223 (2003-12-01), Wang et al.
patent: 6797556 (2004-09-01), Murthy et al.
patent: 20030136985 (2003-07-01), Murthy et al.
patent: 20030139001 (2003-07-01), Snyder et al.
patent: 20030146428 (2003-08-01), Ma et al.
patent: 20030162348 (2003-08-01), Yeo et al.
patent: 20030219971 (2003-11-01), Cabral, Jr. et al.
patent: 20030227029 (2003-12-01), Lochtefeld et al.
patent: 20040188760 (2004-09-01), Skotnicki et al.

Affiliated with

Also associated with

Rating

Strained silicon NMOS devices with embedded source/drain does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Strained silicon NMOS devices with embedded source/drain, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Strained silicon NMOS devices with embedded source/drain will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3396409