Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-07-26
2005-07-26
Coleman, W. David (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S258000, C438S297000
Reexamination Certificate
active
06921690
ABSTRACT:
An EPROM structure includes a NMOS transistor integrated with a capacitor. The terminal names of the NMOS transistor follow the conventional nomenclature: drain, source, body and gate. The gate of the NMOS transistor is connected directly and exclusively to one of the capacitor plates. In this configuration, the gate is now referred to as the “floating gate”. The remaining side of the capacitor is referred to as the “control gate”.
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Barnes & Thornburg LLP
Intersil America's Inc.
Nguyen Khiem
LandOfFree
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