Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate
2005-01-25
2005-01-25
Tran, M. (Department: 2818)
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
C365S230060
Reexamination Certificate
active
06847560
ABSTRACT:
An improved output buffer having a substantially constant slew rate comprises a slew rate control circuit and an output driver circuit. The slew rate control circuit is configured at the input terminals of the output driver circuit to suitably control the slew rate of the input signal for the output driver circuit based on the level of voltage of a power supply for the output driver circuit. For increases in the voltage of the power supply, the slew rate of the input signal of the output driver circuit is decreased, while for decreases in the voltage of the power supply, the slew rate of the input signal of the output driver circuit is increased, such that the variation of the slew rate of the output signal of the output buffer is significantly reduced.
REFERENCES:
patent: 5191269 (1993-03-01), Carbolante
patent: 5568081 (1996-10-01), Lui et al.
patent: 5872736 (1999-02-01), Keeth
patent: 6236248 (2001-05-01), Koga
patent: 6714462 (2004-03-01), Pan
Snell & Wilmer L.L.P.
Tran M.
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