Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2005-07-12
2005-07-12
Nguyen, Cuong (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S309000, C257S296000
Reexamination Certificate
active
06917067
ABSTRACT:
In one embodiment, a plurality of contact holes are formed using an self-aligned contact (SAC) process to expose active regions. When storage node contact or BC pads are formed in the contact holes, a conductive layer is partially filled in the contact holes to expose the sidewall of an interlayer insulating layer pattern over the BC pads. The exposed sidewall of the interlayer insulating layer pattern is covered with an etch stop spacer. Also, the top surface of the interlayer insulating layer pattern is covered with an etch stop layer. Then, a plurality of bit line contact or BC plugs are formed to contact the tops of the BC pads. A protruded region, which extends in one direction, is preferably formed on the sidewall of the contact plug.
REFERENCES:
patent: 6426255 (2002-07-01), Asano et al.
patent: 6433381 (2002-08-01), Mizutani et al.
patent: 10-233445 (1998-09-01), None
English language Abstract of Japanese Patent Publication No. 10-233445.
Marger & Johnson & McCollom, P.C.
Nguyen Cuong
Samsung Electronics Co,. Ltd.
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