Semiconductor memory device having a memory region and a...

Details Semiconductor memory device having a memory region and a... Semiconductor memory device having a memory region and a...

2005-03-22

2005-03-22

Wilson, Allan R. (Department: 2815)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S201000, C438S211000, C438S241000, C438S258000

Reexamination Certificate

active

06869845

ABSTRACT:
A method for manufacturing a semiconductor memory device having a memory region and a peripheral region, including forming a memory cell on the memory region and a peripheral transistor on the peripheral region, the memory cell having a first gate electrode and a first diffusion layer, the peripheral transistor having a second gate electrode and a second diffusion layer; forming a silicon nitride layer above an upper surface and a side surface of the first gate electrode of the memory cell and above an upper surface and a side surface of the second gate electrode of the peripheral transistor; removing the silicon nitride layer that is formed above the upper surface of the second gate electrode of the peripheral transistor; forming an interlayer insulating film above the memory cell and the peripheral transistor; forming a first contact hole that reaches the upper surface of the second gate electrode of the peripheral transistor by removing a portion of the interlayer insulating film; and forming a conductive layer in the first contact hole that is electrically connected to the second gate electrode of the peripheral transistor.

REFERENCES:
patent: 6380584 (2002-04-01), Ogawa
patent: 6518124 (2003-02-01), Ebina et al.
patent: 6548862 (2003-04-01), Ryu et al.
patent: 6756262 (2004-06-01), Nakamura et al.
patent: 20020100929 (2002-08-01), Ebina et al.
patent: 20040075133 (2004-04-01), Nakagawa et al.
patent: 2002-110822 (2002-04-01), None

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